Watchdog oscillator control
| DIVSEL | Select divider for Fclkana. wdt_osc_clk = Fclkana/ (2 x (1 + DIVSEL)) 00000: 2 x (1 + DIVSEL) = 2 00001: 2 x (1 + DIVSEL) = 4 to 11111: 2 x (1 + DIVSEL) = 64 |
| FREQSEL | Select watchdog oscillator analog output frequency (Fclkana). 1 (0_5_MHZ): 0.5 MHz 2 (0_8_MHZ): 0.8 MHz 3 (1_1_MHZ): 1.1 MHz 4 (1_4_MHZ): 1.4 MHz 5 (1_6_MHZ): 1.6 MHz 6 (1_8_MHZ): 1.8 MHz 7 (2_0_MHZ): 2.0 MHz 8 (2_2_MHZ): 2.2 MHz 9 (2_4_MHZ): 2.4 MHz 10 (2_6_MHZ): 2.6 MHz 11 (2_7_MHZ): 2.7 MHz 12 (2_9_MHZ): 2.9 MHz 13 (3_1_MHZ): 3.1 MHz 14 (3_2_MHZ): 3.2 MHz 15 (3_4_MHZ): 3.4 MHz |
| RESERVED | Reserved |